DDC112 Datasheet, PDF (14/24 Pages) Burr-Brown (TI) – Dual Current Input 20-Bit ANALOG-TO-DIGITAL CONVERTER

Ncont Mode
Figure 13 illustrates operation in the ncont mode. The
integrations come in pairs (i.e., sides A/B or sides B/A)
followed by a time during which no integrations occur.
During that time, the previous integrations are being mea-
sured, reset and auto-zeroed. Before the DDC112 can ad-
vance to states 3 or 6, both sides A and B must be finished
with the m/r/az cycle which takes time t₁₀. When the m/r/az
cycles are completed, time t₁₁ is needed to prepare the next
side for integration. This time is required for the ncont
mode because the m/r/az cycle of the ncont mode is slightly
different from that of the cont mode. After the first integra-
tion ends, DVALID goes LOW in time t₈. This is the same
time as in the cont mode. The second data will be ready in
time t₉ after the first data is ready. One result of the naming
convention used in this application bulletin is that when the
DDC112 is operating in the “ncont mode”, it passes through
both “ncont mode states” and “cont mode states”. For
example, in Figure 13, the state pattern is 3, 4, 1, 2, 3, 4, 1,
2, 3, 4...where 3 and 4 are cont mode states. “Ncont mode”
by definition means that for some portion of the time,
neither side A nor B is integrating. States that perform an
integration are labeled “cont mode states” while those that
do not are called “ncont mode states”. Since integrations are
performed in the ncont mode, just not continuously, some
cont mode states must be used in a ncont mode state pattern.
CONV
State
Integration
Status
m/r/az
Status
mbsy
DVALID
3
4
1
Int A Int B
23
4
t₁₁
Int A Int B
m/r/az A
m/r/az B
t₁₀
m/r/az A
1
2
m/r/az B
t₉
t₈
Side A
Data
Side B
Data
Side A
Data
Side B
Data
SYMBOL
t₈
t₉
t₁₀
t₁₁
DESCRIPTION
1st ncont mode data ready
2nd ncont mode data ready
Ncont mode m/r/az cycle
Prepare side for integration
VALUE (CLK = 10MHz)
421.2 ±0.3µs
4548.0µs
910.8µs
≥ 24.0µs
FIGURE 13. Non-Continuous Mode Timing.
VALUE (CLK = 15MHz)
280.5 ±0.2µs
3028.9µs
601.1µs
≥ 24.0µs
®
DDC112
14