AT32UC3L0256_14 Datasheet, PDF (503/852 Pages) ATMEL Corporation – Read-modify-write Instructions and Atomic Bit Manipulation

AT32UC3L0128/256
22. Two-wire Slave Interface (TWIS)
Rev.: 1.2.0.1
22.1 Features
• Compatible with I²C standard
– Transfer speeds of 100 and 400 kbit/s
– 7 and 10-bit and General Call addressing
• Compatible with SMBus standard
– Hardware Packet Error Checking (CRC) generation and verification with ACK response
– SMBALERT interface
– 25 ms clock low timeout delay
– 25 ms slave cumulative clock low extend time
• Compatible with PMBus
• DMA interface for reducing CPU load
• Arbitrary transfer lengths, including 0 data bytes
• Optional clock stretching if transmit or receive buffers not ready for data transfer
• 32-bit Peripheral Bus interface for configuration of the interface
22.2 Overview
The Atmel Two-wire Slave Interface (TWIS) interconnects components on a unique two-wire
bus, made up of one clock line and one data line with speeds of up to 400 kbit/s, based on a
byte-oriented transfer format. It can be used with any Atmel Two-wire Interface bus, I²C, or
SMBus-compatible master. The TWIS is always a bus slave and can transfer sequential or sin-
gle bytes.
Below, Table 22-1 lists the compatibility level of the Atmel Two-wire Slave Interface and a full I²C
compatible device.
Table 22-1. Atmel TWIS Compatibility with I²C Standard
I²C Standard
Atmel TWIS
Standard-mode (100 kbit/s)
Supported
Fast-mode (400 kbit/s)
Supported
7 or 10 bits Slave Addressing
START BYTE⁽¹⁾
Supported
Not Supported
Repeated Start (Sr) Condition
Supported
ACK and NAK Management
Supported
Slope control and input filtering (Fast mode)
Supported
Clock stretching
Supported
Note: 1. START + b000000001 + Ack + Sr
32145C–06/2013
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