AT32UC3L0256_14 Datasheet, PDF (304/852 Pages) ATMEL Corporation – Read-modify-write Instructions and Atomic Bit Manipulation

15.6.3 Status Register
Name:
SR
Access Type:
Read-only
Offset:
0x008
Reset Value:
0x00000003
AT32UC3L0128/256
31
30
29
28
27
-
-
-
-
-
23
22
21
20
19
-
-
-
-
-
15
14
13
12
11
-
-
-
-
-
7
6
5
4
3
-
-
-
-
-
• CLEARED: WDT Counter Cleared
This bit is cleared when writing a one to the CLR.WDTCLR bit.
This bit is set when clearing the WDT counter is done.
• WINDOW: Within Window
This bit is cleared when the WDT counter is inside the TBAN period.
This bit is set when the WDT counter is inside the PSEL period.
26
25
24
-
-
-
18
17
16
-
-
-
10
9
8
-
-
-
2
1
0
-
CLEARED
WINDOW
32145C–06/2013
304