AT32UC3L0256_14 Datasheet, PDF (349/852 Pages) ATMEL Corporation – Read-modify-write Instructions and Atomic Bit Manipulation

AT32UC3L0128/256
18.6.2 Advanced Operation
18.6.2.1
Peripheral I/O Pin Control
When a GPIO pin is assigned to a peripheral function, i.e. the corresponding bit in GPER is zero,
output and output enable is controlled by the selected peripheral pin. In addition the peripheral
may control some or all of the other GPIO pin functions listed in Table 18-1, if the peripheral sup-
ports those features. All pin features not controlled by the selected peripheral is controlled by the
GPIO.
Refer to the Module Configuration section for details regarding implemented GPIO pin functions
and to the Peripheral chapter for details regarding I/O pin function control.
Table 18-1. I/O Pin function Control
Function name
GPIO mode
Output
OVR
Output enable
ODER
Pull-up
PUER
Peripheral mode
Peripheral
Peripheral
Peripheral if supported, else GPIO
18.6.2.2
18.6.2.3
Pull-up Resistor Control
Pull-up can be configured for each GPIO pin. Pull-up allows the pin and any connected net to be
pulled up to VDD if the net is not driven.
Pull-up is useful for detecting if a pin is unconnected or if a mechanical button is pressed, for var-
ious communication protocols and to keep unconnected pins from floating.
Pull-up can be enabled and disabled by writing a one and a zero respectively to the correspond-
ing bit in the Pull-up Enable Register (PUER).
Output Pin Timings
Figure 18-3 shows the timing of the GPIO pin when writing to the Output Value Register (OVR).
The same timing applies when performing a ‘set’ or ‘clear’ access, i.e. writing to OVRS or
OVRC. The timing of PVR is also shown.
Figure 18-3. Output Pin Timings
CLK_GPIO
Write OVR to 1
PB Access
Write OVR to 0
PB Access
OVR / I/O Line
PVR
18.6.2.4
Interrupts
The GPIO can be configured to generate an interrupt when it detects a change on a GPIO pin.
Interrupts on a pin are enabled by writing a one to the corresponding bit in the Interrupt Enable
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