AT32UC3L0256_14 Datasheet, PDF (446/852 Pages) ATMEL Corporation – Read-modify-write Instructions and Atomic Bit Manipulation

20.8.4 Transmit Data Register
Name:
TDR
Access Type:
Write-only
Offset:
0x0C
Reset Value:
0x00000000
AT32UC3L0128/256
31
30
29
28
27
26
25
24
-
-
-
-
-
-
-
LASTXFER
23
22
21
20
19
18
17
16
-
-
-
-
PCS
15
14
13
12
11
10
9
8
TD[15:8]
7
6
5
4
3
2
1
0
TD[7:0]
• LASTXFER: Last Transfer
1: The current NPCS will be deasserted after the character written in TD has been transferred. When CSRn.CSAAT is one, this
allows to close the communication with the current serial peripheral by raising the corresponding NPCS line as soon as TD
transfer has completed.
0: Writing a zero to this bit has no effect.
This field is only used if Variable Peripheral Select is active (MR.PS = 1).
• PCS: Peripheral Chip Select
If PCSDEC = 0:
PCS = xxx0NPCS[3:0] = 1110
PCS = xx01NPCS[3:0] = 1101
PCS = x011NPCS[3:0] = 1011
PCS = 0111NPCS[3:0] = 0111
PCS = 1111forbidden (no peripheral is selected)
(x = don’t care)
If PCSDEC = 1:
NPCS[3:0] output signals = PCS
This field is only used if Variable Peripheral Select is active (MR.PS = 1).
• TD: Transmit Data
Data to be transmitted by the SPI Interface is stored in this register. Information to be transmitted must be written to the TDR
register in a right-justified format.
32145C–06/2013
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