U2739M-B Datasheet, PDF (5/69 Pages) ATMEL Corporation – DAB One-Chip Channel- and Source Decoder

1 Features
U2739M-B
1.1 General
D Support of mode I, II, III and IV acc. to ETS 300 401
D Time & frequency synchronization with a wide-range
parameter set
D Optional implementation of user-defined synchro-
nization strategy by using USE boot mode
D Flexible software configuration:
set 1 – (temic kernel), set 2 – (user extension) concept
D Automatic mode detection (AMD)
D FIC on-chip memory, access via MC interface
D Generation of receiver status information
D Generation of tuner control signals
D Generation of pulse width modulated VCXO control
signal
D Power supply 3.3 V, master clock 24.576 MHz
D Plastic TQFP100 package or
D Ceramic QFP144 package for software development
D Digital AGC with a wide gain control range
D Off-chip de-interleaver memory for full 1.8 Mbit/s
decoding data rate
D Time & frequency synchronization on DSP OAK core
D Support of TII decoding and corresponding RDI
insertion (set 2)
1.3 Audio Source Decoder
D Supports MPEG1 layer II streams according to ISO/
IEC 11172/3
D Supports MPEG2 layer II (half sampling rate) streams
according to ISO/IEC 13818–3
D Supports all bit rates defined in the ETS 300 401
standard
D I²S and SPDIF output interfaces
D Programmable fader
D Programmable DRC
D PAD extraction
1.2 Channel Decoder
D Demodulation and decoding of up to 64 UEP/EEP
sub-channels
D Support of dynamic multiplex reconfiguration
(DMR) without mute state
D Digital Null-Symbol detection (FSYNCH generation)
D Channel filtering (48 dB)
D Optional SAW filter equalization
D Digital AFC (freq. tolerance < 0.5 Hz for mode I)
1.4 Data Decoder
D 2 independent packet mode decoder
D Flexible configuration via MC commands
D Data group length limited to ~1 kbyte each
D Output via HSSO or V24
D DD1 option: FIDC decoder
D Support of AIC decoding (set 2)
Rev. A1, 22-May-01
5 (69)