U2739M-B Datasheet, PDF (23/69 Pages) ATMEL Corporation – DAB One-Chip Channel- and Source Decoder

U2739M-B
6.6.4 SRAM Interface Timing Parameter
Parameter
Read/ write cycle time
Output delay SRAM_A(18:0)
Output delay SRAM_WR
Output delay SRAM_OE
Setup time SRAM_D(7:0)
Write pulse with
Output delay SRAM_D(7:0)
Data valid to end of write
Symbol Min.
Typ.
Max.
Unit
tavav
40.7
ns
td1
15.0
25.0
35.0
ns
td2
12.0
20.0
28.0
ns
td3
16.0
24.0
32.0
ns
tsdata
2.0
ns
twleh
33.0
40.7
48.0
ns
tddata
15.0
23.0
31.0
ns
tdvwh
33.0
40.7
48.0
ns
6.7 VCXO Interface
6.7.1 VCXO Interface Signal Description
QFP144 QFP100 Pin Name
19
13 AVSS1
20
14 XIN
21
15 XOUT
22
16 AVDD1
25
18 PWM
Signal Description
Analog ground
Oscillator input
Oscillator output
Analog power supply
Pulse width modulated control output
Pad Type
PVSS3Z
PDX02
(PDX02)
PVDD3Z
PRO04T
Dir. 5 V Tol.
gnd
x
osc
osc
pwr
out
6.7.2 VCXO Interface Description
U2739M-B
PWM
XIN
PAD
PAD
XOUT
PAD
PLL
49.192 MHz
VCXO 24.576 MHz
f_PWM = f_clk2457 / 2ⁿ
n = 11 –> f_PWM = 12 kHz
Figure 12. VCXO application circuit
The U2739M-B master clock should be derived from a voltage-controlled reference oscillator. The pulse width modu-
lated output signal PWM of the U2739M-B can be used to control the VCXO frequency of 24.576 MHz.
Rev. A1, 22-May-01
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