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EP4SGX360KF40C4N Datasheet, PDF (65/82 Pages) Altera Corporation – Device Datasheet and Addendum for Stratix IV Devices
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Switching Characteristics
1–57
Table 1–43 lists the DPA lock time specifications for Stratix IV ES devices.
Table 1–43. DPA Lock Time Specifications—Stratix IV ES Devices Only (1), (2), (3)
Standard
Training Pattern
Number of Data
Transitions in
one repetition
of training
pattern
Number of
repetitions
per 256
data
transitions
(4)
Condition
Maximum
SPI-4
00000000001111111111
2
without DPA PLL
calibration
128
with DPA PLL
calibration
Parallel Rapid
I/O
00001111
10010000
without DPA PLL
calibration
2
128
with DPA PLL
calibration
without DPA PLL
calibration
4
64
with DPA PLL
calibration
Miscellaneous
10101010
01010101
without DPA PLL
calibration
8
32
with DPA PLL
calibration
without DPA PLL
calibration
8
32
with DPA PLL
calibration
Notes to Table 1–43:
(1) The DPA lock time is for one channel.
(2) One data transition is defined as a 0-to-1 or 1-to-0 transition.
(3) The DPA lock time applies to commercial, industrial, and military speed grades.
(4) This is the number of repetition for the stated training pattern to achieve 256 data transitions.
(5) Slow clock = Data rate (Mbps)/Deserialization factor.
256 data transitions
3x256 data transitions +
2x96 slow clock cycles (5)
256 data transitions
3x256 data transitions +
2x96 slow clock cycles (5)
256 data transitions
3x256 data transitions +
2x96 slow clock cycles (5)
256 data transitions
3x256 data transitions +
2x96 slow clock cycles (5)
256 data transitions
3x256 data transitions +
2x96 slow clock cycles (5)
Figure 1–4 shows the DPA lock time specifications with DPA PLL calibration enabled.
Figure 1–4. DPA Lock Time Specification with DPA PLL Calibration Enabled
rx_reset
rx_dpa_locked
DPA Lock Time
256 data
transitions
96 slow
clock cycles
256 data
transitions
96 slow
clock cycles
256 data
transitions
January 2014 Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum