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EP4SGX360KF40C3N Datasheet, PDF (63/82 Pages) Altera Corporation – This chapter covers the electrical and switching characteristics for Stratix IV devices
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Switching Characteristics
1–55
Table 1–42. High-Speed I/O Specifications (1), (2) (Part 2 of 3)
Symbol
Conditions
–2/–2× Speed Grade –3 Speed Grade
–4 Speed Grade
Unit
Min Typ Max Min Typ Max Min Typ Max
Transmitter
SERDES factor J = 3 to 10 (9) (4) — 1600 (4) — 1250 (4) — 1250 Mbps
True Differential I/O
Standards - fHSDR
(data rate)
SERDES factor J = 2,
Uses DDR Registers
SERDES factor J = 1,
Uses an SDR Register
(4)
—
(5)
(4)
—
(5)
(4)
—
(5) Mbps
(4)
—
(5)
(4)
—
(5)
(4)
—
(5) Mbps
Emulated
Differential I/O
Standards with
Three External
Output Resistor
Networks - fHSDR
(data rate) (6)
Emulated
Differential I/O
Standards with One
External Output
Resistor - fHSDR
(data rate)
SERDES factor J = 4 to 10
(4) — 1250 (4) — 1152 (4) — 800 Mbps
(4)
—
311
(4)
—
200
(4)
—
200 Mbps
tx Jitter - True
Differential I/O
Standards
Total Jitter for Data Rate,
600 Mbps to 1.6 Gbps
Total Jitter for Data Rate,
< 600 Mbps
— — 160 — — 160 — — 160 ps
— — 0.1 — — 0.1 — — 0.1 UI
tx Jitter - Emulated
Differential I/O
Standards with
Three External
Output Resistor
Network
Total Jitter for Data Rate,
600 Mbps to 1.25 Gbps
Total Jitter for Data Rate
< 600 Mbps
— — 300 — — 300 — — 325 ps
— — 0.2 — — 0.2 — — 0.25 UI
tx Jitter - Emulated
Differential I/O
Standards with One
—
External Output
Resistor Network
— — 0.125 — — 0.15 — — 0.15 UI
Tx output clock duty cycle for
tDUTY
both True and Emulated
45 50 55 45 50 55 45 50 55 %
Differential I/O Standards
True Differential I/O Standards — — 160 — — 200 — — 200 ps
tRISE & tFALL
Emulated Differential I/O
Standards with Three External — — 250 — — 250 — — 300 ps
Output Resistor Networks
Emulated Differential I/O
Standards with One External — — 460 — — 500 — — 500 ps
Output Resistor
July 2012 Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum