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EP4SGX360KF40C3N Datasheet, PDF (15/82 Pages) Altera Corporation – This chapter covers the electrical and switching characteristics for Stratix IV devices
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
1–7
Electrical Characteristics
Table 1–8. Transceiver Power Supply Operating Conditions for Stratix IV GT Devices (Part 2 of 2) (1), (2)
Symbol
Description
Minimum Typical Maximum Unit
VCCR_R
Receiver power (right side)
1.15
1.2
1.25
V
VCCT_L
Transmitter power (left side)
1.15
1.2
1.25
V
VCCT_R
VCCL_GXBLn (3)
VCCL_GXBRn (3)
VCCH_GXBLn (3)
VCCH_GXBRn (3)
Transmitter power (right side)
Transceiver clock power (left side)
Transceiver clock power (right side)
Transmitter output buffer power (left side)
Transmitter output buffer power (right side)
1.15
1.2
1.25
V
1.15
1.2
1.25
V
1.15
1.2
1.25
V
1.33
1.4
1.47
V
1.33
1.4
1.47
V
Notes to Table 1–8:
(1) For the recommended operating conditions for Stratix IV GT engineering sample (ES1) devices, contact your local Altera sales representative.
(2) Transceiver power supplies do not have power-on-reset circuitry. After initial power-up, violating the transceiver power supply operating
conditions could lead to unpredictable link behavior.
(3) n = 0, 1, 2, or 3.
DC Characteristics
This section lists the supply current, I/O pin leakage current, bus hold, on-chip
termination (OCT) tolerance, input pin capacitance, and hot socketing specifications.
Supply Current
Standby current is the current drawn from the respective power rails used for power
budgeting. Use the Excel-based Early Power Estimator (EPE) to get supply current
estimates for your design because these currents vary greatly with the resources you
use.
f For more information about power estimation tools, refer to the PowerPlay Early Power
Estimator User Guide and the PowerPlay Power Analysis chapter in the Quartus II
Handbook.
I/O Pin Leakage Current
Table 1–9 lists the Stratix IV I/O pin leakage current specifications.
Table 1–9. I/O Pin Leakage Current for Stratix IV Devices (1)
Symbol
Description
Conditions
II
Input pin
VI = 0V to VCCIOMAX
IOZ
Tri-stated I/O pin
VO = 0V to VCCIOMAX
Note to Table 1–9:
(1) VREF current refers to the input pin leakage current.
Min
Typ
-20
—
-20
—
Max Unit
20
µA
20
µA
July 2012 Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum