EP4SGX360KF40C3N Datasheet, PDF (30/82 Pages) Altera Corporation – This chapter covers the electrical and switching characteristics for Stratix IV devices

Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Switching Characteristics
1–22
Table 1–23. Transceiver Specifications for Stratix IV GX Devices (Part 7 of 9)
Symbol/
Description
Conditions
–2 Commercial
Speed Grade
–3 Commercial/
Industrial and
–2× Commercial
Speed Grade ⁽¹⁾
–3 Military ⁽²⁾
and –4
Commercial/Industrial
Speed Grade
Unit
Min Typ Max Min Typ Max Min Typ Max
N < 18 channels
located across
three
transceiver
blocks with the
source CMU
—
— 400 —
— 400 —
— 400
ps
PLL located in
the center
Inter-transceiver
block skew in Basic
transceiver
block
(PMA Direct) ×N
mode ⁽¹⁵⁾
N  18 channels
located across
four transceiver
blocks with the
source CMU
PLL located in
—
— 650 —
— 650 —
— 650
ps
one of the two
center
transceiver
blocks
CMU0 PLL and CMU1 PLL
Supported Data
Range
—
pll_powerdown
minimum pulse
width
—
(tpll_powerdown)
CMU PLL lock time
from
—
pll_powerdown
de-assertion
600 — 8500 600 — 6500 600 — 6375 Mbps
1
s
— — 100 — — 100 — — 100 s
July 2012 Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum