AS4C32M16SB-7TIN Datasheet, PDF (27/55 Pages) Alliance Semiconductor Corporation – 54pin TSOPII PACKAGE

AS4C32M16SB-6TIN
AS4C32M16SB-7TIN
AS4C32M16SB-7TCN
Figure 23. Self Refresh Entry & Exit Cycle
CLK
CKE
CS#
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19
*Note 1
*Note 2
tIS
*Note 3,4
*Note 5
tXSR *Note 8
tIS tIH
*Note 6
tPDE
*Note 7
RAS#
CAS#
WE#
BA0,1
A10
A0-A9,
A11-A12
DQM
DQ
Hi-Z
Self Refresh Entry
*Note 9
Hi-Z
Self Refresh Exit
Auto Refresh
Don’t Care
Note: To Enter SelfRefresh Mode
1. CS#, RAS# & CAS# with CKE should be low at the same clock cycle.
2. After 1 clock cycle, all the inputs including the system clock can be don't care except for CKE.
3. The device remains in SelfRefresh mode as long as CKE stays "low".
4. Once the device enters SelfRefresh mode, minimum tRAS is required before exit from SelfRefresh.
To Exit SelfRefresh Mode
5. System clock restart and be stable before returning CKE high.
6. Enable CKE and CKE should be set high for valid setup time and hold time.
7. CS# starts from high.
8. Minimum tXSR is required after CKE going high to complete SelfRefresh exit.
9. 8192 cycles of burst AutoRefresh is required before SelfRefresh entry and after SelfRefresh exit if the
system uses burst refresh.
Confidential
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Rev.1.0 June 2016