AS4C32M16SB-7TIN Datasheet, PDF (10/55 Pages) Alliance Semiconductor Corporation – 54pin TSOPII PACKAGE

AS4C32M16SB-6TIN
AS4C32M16SB-7TIN
AS4C32M16SB-7TCN
CLK
DQM
COMMAND
T0
T1 T2 T3 T4 T5 T6
T7
T8
NOP
NOP
READ A
NOP
NOP
WRITE B
NOP
NOP
NOP
CAS# Latency=2
t_CK2, DQ
DIN B0
Must be Hi-Z before
the Write Command
DIN B1
DIN B2
DIN B3
Don’t Care
Figure 7. Read to Write Interval (Burst Length ≥ 4, CAS# Latency = 2)
CLK
DQM
COMMAND
T0
T1 T2 T3 T4 T5 T6
T7
T8
NOP
READ A
NOP
NOP
NOP
NOP
WRITE B
NOP
NOP
CAS# Latency=3
t_CK3, DQ
DOUT A0
DIN B0
Must be Hi-Z before
the Write Command
DIN B1
DIN B2
Don’t Care
Figure 8. Read to Write Interval (Burst Length ≧ 4, CAS# Latency = 3)
A read burst without the auto precharge function may be interrupted by a BankPrecharge/
PrechargeAll command to the same bank. The following figure shows the optimum time that Bank
Precharge/ PrechargeAll command is issued in different CAS latency.
CLK
ADDRESS
COMMAND
T0
T1 T2 T3 T4 T5 T6
T7
T8
Bank,
Col A
READ A
NOP
NOP
NOP
Bank (s)
Precharge
t_RP
NOP
Bank
Row
NOP
Activate
NOP
CAS# Latency=2
t_CK2, DQ
DOUT A0 DOUT A1 DOUT A2 DOUT A3
CAS# Latency=3
t_CK3, DQ
DOUT A0 DOUT A1 DOUT A2 DOUT A3
Figure 9. Read to Precharge (CAS# Latency = 2, 3)
Confidential
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Rev.1.0 June 2016