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AS4C32M16SB-7TIN Datasheet, PDF (21/55 Pages) Alliance Semiconductor Corporation – 54pin TSOPII PACKAGE
AS4C32M16SB-6TIN
AS4C32M16SB-7TIN
AS4C32M16SB-7TCN
Table 16. Electrical Characteristics and Recommended A.C. Operating Conditions
(VDD = 3.3V ± 0.3V, TA = -40~85°C) (Note: 5, 6, 7, 8)
Symbol
A.C. Parameter
-6
-7
Min. Max. Min. Max. Unit Note
tRC
Row cycle time (same bank)
60 - 63 -
tRFC Refresh cycle time
60 - 63 -
tRCD RAS# to CAS# delay (same bank)
18 - 21 -
tRP
Precharge to refresh/row activate command
(same bank)
18 - 21 -
tRRD Row activate to row activate delay
(different banks)
12 - 14 -
tMRD Mode register set cycle time
12 - 14 -
tRAS
Row activate to precharge time (same bank) 42 120K 42 120K
tWR
Write recovery time
12 - 14 -
tCK
Clock cycle time
CL* = 2 10
-
10
-
ns 9
CL* = 3 6
-
7
-
tCH
Clock high time
2
- 2.5 -
10
tCL
Clock low time
2
- 2.5 -
10
Access time from CLK
tAC
(positive edge)
CL* = 2 -
6
-
6
10
CL* = 3 -
5
- 5.4
tOH
Data output hold time
2.5 - 2.5 -
9
tLZ
Data output low impedance
0
-
0
-
tHZ
Data output high impedance
-
5
- 5.4
8
tIS
Data/Address/Control Input set-up time
1.5 - 1.5 -
10
tIH
Data/Address/Control Input hold time
0.8 - 0.8 -
10
tPDE Power Down Exit set-up time
tIS+tCK - tIS+tCK -
tREFI Average Refresh interval time
- 7.8 - 7.8 μs
tXSR Exit Self-Refresh to any Command
tRC+tIS - tRC+tIS -
ns
* CL is CAS Latency.
Note:
1. Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the
device. Absolute maximum DC requirements contain stress ratings only. Functional operation at the
absolute maximum limits is not implied or guaranteed. Extended exposure to maximum ratings may affect
device reliability.
2. All voltages are referenced to VSS. Overshoot VIH (Max) = 4.6V for pulse width ≤ 3ns. Undershoot VIL (Min) = -1.0V
for pulse width ≤ 3ns.
3. These parameters depend on the cycle rate and these values are measured by the cycle rate under the
minimum value of tCK and tRC. Input signals are changed one time during every 2 tCK.
4. These parameters depend on the output loading. Specified values are obtained with the output open.
5. Power-up sequence is described in Note 11.
6. A.C. Test Conditions
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- 21/55 -
Rev.1.0 June 2016