AS4C32M16SB-7TIN Datasheet, PDF (16/55 Pages) Alliance Semiconductor Corporation – 54pin TSOPII PACKAGE

AS4C32M16SB-6TIN
AS4C32M16SB-7TIN
AS4C32M16SB-7TCN
• Test Mode field (A8~A7)
These two bits are used to enter the test mode and must be programmed to "00" in normal operation.
Table 10. Test Mode
A8
A7
0
0
0
1
1
X
Test Mode
normal mode
Vendor Use Only
Vendor Use Only
• Write Burst Length (A9)
This bit is used to select the write burst length. When the A9 bit is "0", the Burst-Read-Burst-Write
mode is selected. When the A9 bit is "1", the Burst-Read-Single-Write mode is selected.
Table 11. Write Burst Length
A9
Write Burst Length
0
Burst-Read-Burst-Write
1
Burst-Read-Single-Write
Note: A10 and BA0, 1 should stay “L” during mode set cycle.
9 No-Operation command
(RAS# = "H", CAS# = "H", WE# = "H")
The No-Operation command is used to perform a NOP to the SDRAM which is selected (CS# is
Low). This prevents unwanted commands from being registered during idle or wait states.
10 Burst Stop command
(RAS# = "H", CAS# = "H", WE# = "L")
The Burst Stop command is used to terminate either fixed-length or full-page bursts. This
command is only effective in a read/write burst without the auto precharge function. The terminated
read burst ends after a delay equal to the CAS latency (refer to the following figure). The termination of
a write burst is shown in the following figure.
CLK
T0
T1 T2 T3 T4 T5 T6
T7 T8
COMMAND
READ A
NOP
NOP
NOP
Burst
Stop
NOP
NOP
NOP
NOP
CAS# Latency=2
t_CK2, DQ
The burst ends after a delay equal to the CAS# Latency
DOUT A0 DOUT A1 DOUT A2 DOUT A3
CAS# Latency=3
t_CK3, DQ
DOUT A0 DOUT A1 DOUT A2 DOUT A3
Figure 16. Termination of a Burst Read Operation (Burst Length＞4, CAS# Latency = 2, 3)
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