AS4C32M16SB-7TIN Datasheet, PDF(11/55 Page) Alliance Semiconductor Corporation

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AS4C32M16SB-7TIN Datasheet, PDF (11/55 Pages) Alliance Semiconductor Corporation – 54pin TSOPII PACKAGE

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AS4C32M16SB-6TIN

AS4C32M16SB-7TIN

AS4C32M16SB-7TCN

5 Read and AutoPrecharge command

(RAS# = "H", CAS# = "L", WE# = "H", BAs = Bank, A10 = "H", A0-A9 = Column Address)

The Read and AutoPrecharge command automatically performs the precharge operation after the

read operation. Once this command is given, any subsequent command cannot occur within a time

delay of {tRP(min.) + burst length}. At full-page burst, only the read operation is performed in this

command and the auto precharge function is ignored.

6 Write command

(RAS# = "H", CAS# = "L", WE# = "L", BAs = Bank, A10 = "L", A0-A9 = Column Address)

The Write command is used to write a burst of data on consecutive clock cycles from an active row

in an active bank. The bank must be active for at least tRCD(min.) before the Write command is issued.

During write bursts, the first valid data-in element will be registered coincident with the Write command.

Subsequent data elements will be registered on each successive positive clock edge (refer to the

following figure). The DQs remain with high-impedance at the end of the burst unless another

command is initiated. The burst length and burst sequence are determined by the mode register, which

is already programmed. A full-page burst will continue until terminated (at the end of the page it will

wrap to column 0 and continue).

CLK

COMMAND

T1 T2 T3 T4 T5 T6

NOP

WRITE A

NOP

DIN A0

DIN A1

DIN A2

DIN A3

donât care

The first data element and the write

are registered on the same clock edge

Figure 10. Burst Write Operation (Burst Length = 4)

A write burst without the auto precharge function may be interrupted by a subsequent Write,

BankPrecharge/PrechargeAll, or Read command before the end of the burst length. An interrupt

coming from Write command can occur on any clock cycle following the previous Write command (refer

to the following figure).

CLK

COMMAND

T1 T2 T3 T4 T5 T6

T7 T8

NOP

WRITE A WRITE B

NOP

DIN A0

DIN B0

DIN B1

DIN B2

DIN B3

Figure 11. Write Interrupted by a Write (Burst Length = 4)

The Read command that interrupts a write burst without auto precharge function should be issued

one cycle after the clock edge in which the last data-in element is registered. In order to avoid data

contention, input data must be removed from the DQs at least one clock cycle before the first read data

appears on the outputs (refer to the following figure). Once the Read command is registered, the data

inputs will be ignored and writes will not be executed.

Confidential

- 11/55 -

Rev.1.0 June 2016

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