AS4C32M16SB-7TIN Datasheet, PDF (26/55 Pages) Alliance Semiconductor Corporation – 54pin TSOPII PACKAGE

Figure 22. Power on Sequence and Auto Refresh
AS4C32M16SB-6TIN
AS4C32M16SB-7TIN
AS4C32M16SB-7TCN
CLK
CKE
CS#
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
High Level
Is reguired
Minimum for 2 Refresh Cycles are required
RAS#
CAS#
WE#
BA0,1
A10
A0-A9
A11-A12
Address Key
DQM
tRP
tMRD
DQ
Hi-Z
Precharge All
Command
Inputs must be
Stable for
200μs
Mode Register
Set Command
1st Auto Refresh^(*)
Command
Note^(*): The Auto Refresh command can be issue before or after Mode Register Set command
2nd Auto Refresh^(*)
Command
Any
Command
Don’t Care
Confidential
- 26/55 -
Rev.1.0 June 2016