AKD4673-A Datasheet, PDF (7/48 Pages) Asahi Kasei Microsystems – stereo CODEC with built-in MIC/HP amplifier and TSC

[AKD4673-A]
(2-3) Evaluation of Loop-back using AK4114
X1 (X’tal) is used. Nothing should be connected to PORT1 (DIR), PORT2 (DIT) and PORT3 (DSP).
The jumper pins should be set as the following.
JP15
MCLK
DIR
EXT
JP18
BICK_SEL
JP21
JP24
LRCK_SEL SDTI_SEL
JP19
JP22
PHASE ^4114_MCKI
DIR 4040 DIR 4040 DIR ADC THR INV
JP16 (MKFS) should be set according to the frequency of MCLK.
(2-4) Evaluation of Loop-back where master clock is fed externally
J11 (EXT) is used. MCKI is supplied from J11 (EXT). BICK and LRCK are generated by 74HC4040 on
AKD4671-A. Nothing should be connected to PORT1 (DIR), PORT2 (DIT) and PORT3 (DSP).
The jumper pins should be set as the following.
JP14
EXT
JP15
MCLK
DIR
EXT
JP18
BICK_SEL
JP21
JP24
LRCK_SEL SDTI_SEL
JP19
PHASE
DIR 4040 DIR 4040 DIR ADC THR INV
*When a termination (51Ω) is unnecessary, please set JP14 (EXT) open.
JP16 (MKFS) should be set according to the frequency of MCLK.
<KM086000>
-7-
2007/5