AKD4673-A Datasheet, PDF (4/48 Pages) Asahi Kasei Microsystems – stereo CODEC with built-in MIC/HP amplifier and TSC

[AKD4673-A]
Evaluation of CODEC
JP104, JP102 should be set to short. JP103, JP105 should be set to open.
(1) External Slave Mode
When PMPLL bit is “0”, the AK4673 becomes EXT mode. Master clock is input from MCKI pin, the internal PLL
circuit is not operated. This mode is compatible with I/F of the normal audio CODEC. The clocks required to
operate are MCKI (256fs, 512fs or 1024fs), LRCK (fs) and BICK (≥32fs). The master clock (MCKI) should be
synchronized with LRCK. The phase between these clocks does not matter. The input frequency of MCKI is
selected by FS1-0 bits.
JP23 (M/S) should be set to “Slave”. In addition, the register of AK4673 should be set to “EXT Slave Mode”.
AK4673
MCKO
MCKI
BICK
LRCK
SDTO
SDTI
256fs, 512fs or 1024fs
DSP or μP
MCLK
≥ 32fs
BCLK
1fs
LRCK
SDTI
SDTO
Figure 2. EXT Slave Mode
(1-1) Evaluation of A/D using DIT of AK4114
PORT2 (DIT) and X1 (X’tal) are used. Nothing should be connected to PORT1 (DIR) and PORT3 (DSP).
The jumper pins should be set to the following.
JP15
MCLK
JP18
BICK_SEL
JP21
LRCK_SEL
JP19
PHASE
JP22
4114_MCKI
DIR
EXT
DIR 4040 DIR 4040 THR INV
(1-2) Evaluation of D/A using DIR of AK4114
PORT1 (DIR) is used. Nothing should be connected to PORT2 (DIT) and PORT3 (DSP).
The jumper pins should be set to the following.
JP15
MCLK
DIR
EXT
JP18
BICK_SEL
JP21
JP24
LRCK_SEL SDTI_SEL
JP19
PHASE
DIR 4040 DIR 4040 DIR ADC THR INV
When AK4114 is used, JP16 (MKFS) and JP17 (BCFS) are not used. Therefore, JP16 (MKFS) should be set to
“256fs” and JP23 (BCFS) should be set to “64fs”.
* The AK4114 operates at fs of 32kHz or more. If the fs is slower than 32kHz, this evaluation mode can’t be used.
<KM086000>
-4-
2007/5