AKD4673-A Datasheet, PDF (12/48 Pages) Asahi Kasei Microsystems – stereo CODEC with built-in MIC/HP amplifier and TSC

[AKD4673-A]
(4-3) Evaluation of Internal Loop-back using clock is fed externally
J11 (EXT) is used. Nothing should be connected to PORT1(DIR) and PORT3 (DSP).
It can be evaluated at internal loop-back mode (LOOP bit = “1”).
Using the AK4673’s internal PLL it is possible to evaluate various sampling frequencies.
The jumper pins should be set to the following.
JP14
EXT
JP15
MCLK
DIR
EXT
JP18
BICK_SEL
JP21
JP24
LRCK_SEL SDTI_SEL
JP19
PHASE
DIR 4040 DIR 4040 DIR ADC THR INV
Evaluation of TSC
PORT4 (CTRL) should be directly connected to the parallel port. (Figure 9)
JP103, JP105 should be set to short. JP102, JP104 should be set to open.
(1) Position, Pen Pressure
4-wire touch-panel (X+, X-, Y+ and Y-) should be connected to J100 connector as the following figure.
5PVDI
1BOFM
3&%
+
",."
#("
Figure 8. Connect of Touch Panel
<KM086000>
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2007/5