AK4122A Datasheet, PDF (49/54 Pages) Asahi Kasei Microsystems – 24-Bit 96kHz SRC with DIR

[AK4122A]
SYSTEM DESIGN
Figure 29 shows the typical system connection diagram. An evaluation board is available which demonstrates application
circuits, the optimum layout, power supply arrangements and measurement results.
• PORT2, PORT3 : Slave Mode
uP & DSP
Digital Supply
3.0 ~ 3.6V
DSP3
10μ
0.1μ
fso
48 47 46 45 44 43 42 41 40 39 38 37
1 CDTI
2 CDTO
3 TST1
SDTIO 36
BICK2 35
LRCK2 34
DSP2
fsi
4 INT2
5 TST2
6 TST3
7 M/S2
8 M/S3
9 SMUTE
Top View
MCLK2 33
DVDD 32
DVSS 31
SDTI 30
BICK1 29
LRCK1 28
Digital Supply
0.1μ 10μ
3.0 ~ 3.6V
DSP1
fsi
10 TST4
PDN 27
Reset
11 TST5
AVSS 26
12 FILT
470Ω
R 25
12kΩ
2.2n
2.2μ
13 14 15 16 17 18 19 20 21 22 23 24
0.1μ
10μ
Shield Shield Shield Shield Shield
Analog Supply
3.0 ~ 3.6V
S/PDIF
sources
Note:
- AVSS, BVSS and DVSS of the AK4122A should be distributed separately from the ground of external digital
devices (MPU, DSP etc.).
- All digital input pins should not be left floating.
Figure 29. Typical Connection Diagram
MS1076-E-01
- 49 -
2010/05