AK4122A Datasheet, PDF (44/54 Pages) Asahi Kasei Microsystems – 24-Bit 96kHz SRC with DIR

[AK4122A]
Addr Register Name
08H Receiver Status 1
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
DAT DTSCD NPCM PEM
FS3
FS2
FS1
FS0
RD
RD
RD
RD
RD
RD
RD
RD
0
0
0
0
0
0
0
1
FS3-0: Sampling Frequency Detection (Table 17)
PEM:
Pre-emphasis Detect (Table 18)
0: OFF
1: ON
This bit is made by decoding the channel status bits.
NPCM: Non-PCM Bit Stream Auto Detection
0: No detect
1: Detect
DTSCD: DTS-CD Bit Stream Auto Detect
0: No detect
1: Detect
DAT:
DAT Start ID Detect
0: No detect
1: Detect
When the category code shows DAT, this bit becomes “1” if the Start ID of DAT is detected as “1”.
Reading 08H register resets this bit to “0”.
DAT bit is initialized when 08H is read.
Addr Register Name
09H Receiver Status 2
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
CCRC QCRC
RD
RD
RD
RD
RD
RD
RD
RD
0
0
0
0
0
0
0
0
QCRC: Cyclic Redundancy Check for Q-subcode
0: No error
1: Error
CCRC: Cyclic Redundancy Check for Channel Status
0: No error
1: Error
This bit is enabled only in professional mode and only for the channel selected by the CS12 bit.
MS1076-E-01
- 44 -
2010/05