AK4682 Datasheet, PDF (40/43 Pages) Asahi Kasei Microsystems – Multi-channel CODEC with 2Vrms Stereo Selector

[AK4682]
1. Grounding and Power Supply Decoupling
The AK4682 requires careful attention to power supply and grounding arrangements. AVDD1, AVDD2, DVDD1,
DVDD2, TVDD and PVDD are usually supplied from analog supply in system. If AVDD1, AVDD2, DVDD1, DVDD2
and TVDD are supplied separately, the power up sequence is not critical. AVSS1, DVSS1, AVSS2, DVSS2 and PVSS
of the AK4682 must be connected to analog ground plane. System analog ground and digital ground should be
connected together near to where the supplies are brought onto the printed circuit board. Decoupling capacitors should
be as near to the AK4682 as possible, with the small value ceramic capacitor being the nearest.
2. Voltage Reference Inputs
The voltage of AVDD1 sets the ADC input range, AVDD2 sets the DAC analog output range. VCOM3 and VCOM36
are signal grounds of this chip. An electrolytic capacitor 10μF parallel with a 0.1μF ceramic capacitor attached between
these VCOM pins and AVSS1 pin eliminates the effects of high frequency noise. No load current may be drawn from
these VCOM pins. All signals, especially clocks, should be kept away from the AVDD1, AVDD2, VCOM3 and
VCOM36 pins in order to avoid unwanted coupling into the AK4682.
3. Analog Inputs
The AK4682 receives the analog input through the single-ended Pre-amp using external resistors. The input range is 2.2
x AVDD1/5 Vrms (typ. fs=48kHz) at each analog input pins. Each input pins are biased internally. The ADC output
data format is 2’s complement. The internal digital HPF removes the DC offset.
The AK4682 samples the analog inputs at 64fs. The digital filter rejects noise above the stop band except for multiples
of 64fs. The AK4682 includes an anti-aliasing filter (RC filter) to attenuate a noise around 64fs.
4. Analog Outputs
The analog outputs are also single-ended and centered on around the AVDD2 voltage. The output signal range scales
with the supply voltage and nominally 2 x AVDD2/5 Vrms at each analog output pins. The DAC input data format is 2’s
complement. The output voltage is a positive full scale for 7FFFFFH(@24bit) and a negative full scale for
800000H(@24bit). The ideal output is AVDD2 voltage for 000000H(@24bit). The internal analog filters remove most
of the noise generated by the delta-sigma modulator of DAC beyond the audio passband.
DC offsets on analog outputs are eliminated by AC coupling since DAC outputs have DC offsets a few mV.
5. Attention to the PCB Wiring
Attention should be given to avoid coupling with other signals on each analog input/output pins. Unused input pins
among LIN1-6 and RIN1-6 pins should be left open.
MS0610-E-01
- 40 -
2007/07