AK4682 Datasheet, PDF (36/43 Pages) Asahi Kasei Microsystems – Multi-channel CODEC with 2Vrms Stereo Selector

[AK4682]
Addr
Register Name
D7
D6
D5
D4
03H De-emphasis/ ATT speed DEM21 DEM20 DEM11 DEM10
Default
0
1
0
1
D3
DAC2
1
D2
D1
D0
DAC1 ATSAD ATSDA
0
0
0
ATSDA: DAC digital Attenuator transition time control
ATSAD: ADC digital Attenuator transition time control
Refer Table 18, Table 19.
DAC2-1: DAC Data control
Refer Table 10, Table 11
DEM11-10: DAC1 De-emphasis filter control
DEM21-20: DAC2 De-emphasis filter control
Refer Table 12.
Addr
04H
Register Name
Clock Control
Default
D7
D6
D5
D4
0
ACKS DFS1 DFS0
0
0
0
0
D3
D2
D1
D0
0 CKSB1 CKSB0 MSB
0
0
0
0
MSB: ADC Master/Slave control
Refer Table 1.
CKSB1-0: ADC Clock control for Master mode.
Refer Table 2.
DFS1-0: DAC Sampling Speed Control
These settings are ignored in Auto Setting Mode. Refer Table 4.
ACKS: DAC Auto Setting Mode
0: Disable, Manual Setting Mode (default)
1: Enable, Auto Setting Mode
Master clock frequency is detected automatically at ACKS bit “1”. In this case, the DFS1-0 bits are
ignored. When this bit is “0”, DFS1-0 bits set the sampling speed mode.
Addr
05H
Register Name
Stereo Matrix Control
Default
D7
PL23
1
D6
PL22
0
PL13-10: DAC1 Stereo Matrix Control.
Refer Table 20.
PL23-20: DAC2 Stereo Matrix Control.
Refer Table 21.
D5
PL21
0
D4
PL20
1
D3
PL13
1
D2
PL12
0
D1
PL11
0
D0
PL10
1
MS0610-E-01
- 36 -
2007/07