AK4633 Datasheet, PDF (26/82 Pages) Asahi Kasei Microsystems – 16-Bit Mono CODEC with ALC & MIC/SPK-AMP

ASAHI KASEI
[AK4633]
OPERATION OVERVIEW
„ System Clock
There are the following four clock modes to interface with external devices (Table 1 and Table 2).
Mode
PMPLL bit M/S bit PLL3-0 bit
PLL Master Mode
1
1
Table 4
PLL Slave Mode 1
(PLL Reference Clock: MCKI pin)
1
0
Table 4
PLL Slave Mode 2
(PLL Reference Clock: FCK or BICK pin)
1
0
Table 4
EXT Slave Mode
0
0
X
EXT Master Mode
0
1
X
Table 1. Clock Mode Setting (X: Don’t care)
Figure
Figure 18
Figure 19
Figure 20
Figure 21
Figure 22
Mode
PLL Master Mode
PLL Slave Mode 1
(PLL Reference Clock: MCKI pin)
MCKO bit MCKO pin MCKI pin
BICK pin
0
1
“L” Output
256fs Output
Master Clock
Input for PLL
(Note 27)
16fs/32fs/64fs
Output
0
1
“L” Output
256fs Output
Master Clock
Input for PLL
(Note 27)
16fs/32fs/64fs
Input
FCK pin
1fs
Output
1fs
Input
PLL Slave Mode 2
(PLL Reference Clock: FCK or BICK pin)
0
“L” Output
GND
16fs/32fs/64fs
Input
EXT Slave Mode
EXT Master Mode
256fs/
0
“L” Output
512fs/
1024fs
Input
≥ 32fs
Input
256fs/
0
“L” Output
512fs/
1024fs
32fs/64fs
Output
Input
Note 27. 11.2896MHz/12MHz/12.288MHz/13.5MHz/24MHz/27MHz
Table 2. Clock pins state in Clock Modes
1fs
Input
1fs
Input
1fs
Output
MS0447-E-03
- 26 -
2006/04