AKD4691-A Datasheet, PDF (19/68 Pages) Asahi Kasei Microsystems – Evaluation board Rev.0 for AK4691

(2-2) HPL/HPR Output Circuit
RCA
R18
HPL
JP12
16
HPL
R17
C35
C15
(short)
220u
HP
0.22u
R22
10
HP
HPR
JP13
HPR
R19
C36
C16
(short)
220u
RCA
0.22u
R20
16
R21
10
[AKD4691-A]
J7
HPL
1
2
3
4
5
J9
HP/LINE
6
4
3
J8
HPR
1
2
3
4
5
Figure 9. HPL/HPR Output Circuit
(2-2-1) In case that HPL/HPR is output from J7 and J8.
JP12
HPL
JP13
HPR
RCA HP
(2-2-2) In case that HPL/HPR is output from J9.
JP12
HPL
RCA HP
JP13
HPR
RCA HP RCA HP
* J9 is shared with LOUT/ROUT.
When HPL/HPR is output from J9, JP10 and JP11 should be set to “RCA”.
<KM089100>
- 19 -
2007/06