AKD4691-A Datasheet, PDF (10/68 Pages) Asahi Kasei Microsystems – Evaluation board Rev.0 for AK4691

(4-2-2) In case of supplying MCKI from X2 (11.2896MHz)
The jumper pins should be set as the following.
JP15
MCLK
JP16
MKFS
JP17
BGFS
[AKD4691-A]
JP18
BICK_SEL
JP19
PHASE
XTL DIR EXT 256fs512fs1024fs MCKO ^32fs
JP21
LRCK_SEL
JP24
SDTI_SEL
JP31
XTE
64fs
JP108
MCKO
DIR 4040
JP106
SDTO
THR INV
DIR 4040 DIR ADC
SDTO1 SDTO2
* When SDTO2 data is looped back to SDTI, JP106 should be set to “SDTO2”.
(4-3) Setting with External Slave Mode
JP23 (M/S) should be set to “Slave”. In addition, the register of AK4691 should be set to “EXT Slave Mode”.
Nothing should be connected to PORT1 (DIR), PORT2 (DIT) and PORT3 (DSP).
(4-3-1) In case of using clocks from AK4114
X1 (12.288MHz) is used.
The jumper pins should be set as the following.
JP15
MCLK
JP18
BICK_SEL
JP19
PHASE
JP21
LRCK_SEL
XTL DIR EXT ^{DIR 4040 THR INV}
DIR 4040
JP22
4114_MCKI
JP24
SDTI_SEL
JP31
XTE
JP106
SDTO
DIR
ADC
SDTO1 SDTO2
* When SDTO2 data is looped back to SDTI, JP106 should be set to “SDTO2”.
<KM089100>
- 10 -
2007/06