AKD4691-A Datasheet, PDF (13/68 Pages) Asahi Kasei Microsystems – Evaluation board Rev.0 for AK4691

[AKD4691-A]
„ Jumper pins set up
Main Board
[JP1] (GND): Analog ground and Digital ground
OPEN: Separated.
SHORT: Common. (The connector “DGND” can be open.) <Default>
[JP2] (REG): Selection of REG
OPEN: REG is not used.
SHORT: REG is used. <Default>
[JP3] (SVDD-SEL): SVDD of the AK4691
OPEN: SVDD is supplied from “SVDD” jack.
SHORT: SVDD is supplied from the regulator (“SVDD” jack should be open). <Default>
[JP4] (AVDD-SEL): AVDD of the AK4691
OPEN: AVDD is supplied from “AVDD” jack.
SHORT: AVDD is supplied from the regulator (“AVDD” jack should be open). <Default>
[JP5] (DVDD-SEL): DVDD of the AK4691
OPEN: DVDD is supplied from “DVDD” jack.
SHORT: DVDD is supplied from “AVDD” (“DVDD” jack should be open). <Default>
[JP6] (TVDD-SEL): TVDD of the AK4691
OPEN: TVDD is supplied from “TVDD” jack.
SHORT: TVDD is supplied from “DVDD” (“TVDD” jack should be open). <Default>
[JP7] (VCC-SEL): VCC of the AK4691
OPEN: VCC is supplied from “VCC” jack.
SHORT: VCC is supplied from “TVDD” (“VCC” jack should be open). <Default>
[JP8] (MVDD-SEL): MVDD of the AK4691
OPEN: MVDD is supplied from “MVDD” jack.
SHORT: MVDD is supplied from “AVDD” (“MVDD” jack should be open). <Default>
[JP16] (MKFS): MCLK Frequency
256fs: 256fs. <Default>
512fs: 512fs.
1024fs: 1024fs.
MCKO: MCKO is used.
[JP17] (BCFS): BICK Frequency
32fs:
32fs.
64fs:
64fs. <Default>
[JP22] (4114-MCKI): AK4114 Clock Source
OPEN: X’tal of AK4114 is used. <Default>
SHORT: MCKO of the AK4691 is supplied to the AK4114.
<KM089100>
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2007/06