AK4121A_10 Datasheet, PDF (19/20 Pages) Asahi Kasei Microsystems – Asynchronous Sample Rate Converter

[AK4121A]
REVISION HISTORY
Date (YY/MM/DD) Revision Reason
Page
04/09/01
00
First Edition
07/06/05
01
Error Correct 4
07/07/25
07/09/14
Description
Change
6
02
Description
Change
13
03
Add Spec
6
Error Correct 6
08/03/05
08/04/05
10/04/30
04
Description
Addition
9
05
Description
Change
5
06
Description
Addition
13
Contents
SRC PERFORMANCE
Dynamic Range, Worst Case
FSO/FSI=32kHz/44.1kHz → 48kHz/96kHz
SWITCHING CHARACTERISTICS
Audio Interface timing
ILRCK Edge to IBICK “↑” is changed to
ILRCK period (8kHz ~ 32kHz): 1/256fs+45
ILRCK period (32kHz ~ 48kHz): 1/256fs+25
ILRCK period (48kHz ~ 96kHz): 1/256fs+15
■ Internal Reset Function for Clock Change
■ Sequence of Changing Clocks
Max values of ILRCK Edge to IBICK “↑” were
added.
ILRCK Frequency =8kHz ~ 32kHz: 16/256fs
ILRCK Frequency =32kHz ~ 48kHz: 16/256fs
ILRCK Frequency =48kHz ~ 96kHz: 16/256fs
The Symbol of ILRCK Edge to IBICK “↑”
tBLR → tLRB
The Symbol of IBICK “↑” to ILRCK Edge
tLRB → tBLR
The Symbol of OLRCK Edge to OBICK “↑”
tBLR → tLRB
The Symbol of OBICK “↑” to OLRCK Edge
tLRB → tBLR
Note 13. was added.
DC CHARACTERISTICS
Power Supply Current
(VDD+TVDD) description was added.
VDD =3.3V → VDD=TVDD=3.3V
VDD= 3.6V → VDD=TVDD=3.6V
■ Sequence of changing clocks
Description is added in notes.
MS0337-E-06
- 19 -
2010/04