AK4121A_10 Datasheet, PDF (15/20 Pages) Asahi Kasei Microsystems – Asynchronous Sample Rate Converter

[AK4121A]
■ Jitter Tolerance
Figure 12 shows the jitter tolerance to ILRCK. The jitter quantity is defined by the jitter frequency and the jitter
amplitude shown in Figure 12. When the jitter amplitude is 0.01UIpp or less, the AK4121A operates normally
regardless of the jitter frequency.
10.00
AK4121A Jitter Tolerance
1.00
(3)
0.10
(2)
0.01
0.00
1
(1)
10
100
1000
Jitter Frequency [Hz]
10000
(1) Normal operation
(2) There is a possibility that the distortion degrades. (It may degrade up to about −50dB.)
(3) There is a possibility that the output data is lost.
Note 15. The jitter amplitude for 1UI (Unit Interval) is one cycle of ILRCK. When FSI = 48kHz, 1UI is 1/48kHz =
20.8μs.
Figure 12. Jitter Tolerance
■ Tracking to the Input Sampling Frequency
When the ILRCK is generated by an external PLL, it may take a time to settle after changing the input sampling
frequency because the response of an external PLL to the frequency change is slow. In case of the AK4121, the output
data becomes incorrect when the speed of the frequency change exceeds 0.14%/sec. The AK4121A operates normally
up to 23%/sec speed and the output data becomes incorrect at the speed of the frequency change over 23%/sec.
MS0337-E-06
- 15 -
2010/04