AKD4683 Datasheet, PDF (15/74 Pages) Asahi Kasei Microsystems – AK4683 Evaluation Board Rev.1

ASAHI KASEI
[AKD4683-A]
6. DIP Switches
6-1. SW2 (PORT A_DIR/4683)
Setting for AK4683 and PORT A: AK4114 (U7)
No. Name
ON (“H”)
OFF (“L”)
1 DIF0
Setting of Audio Format of AK4114
2 DIF1
(Refer Table 2.)
3 DIF2
4 CM0


Selection of Clock Mode (Clock Source)

5 CM1
3FGFS
Table 3.
6 OCKS0 Selection of frequency of Master Clock Output

7 OCKS1
3FGFSTable4.
8
I2C
I²C-bus control mode 4-wire serial
control mode
Table 2. SW2 (PORT A_DIR / 4683)
(Note) ON: “H” (“1”), OFF: “L” (“0”)
Default
OFF (“L”, “0”)
ON (“H”, “1”)
ON (“H”, “1”)
OFF (“L”, “0”)
OFF (“L”, “0”)
OFF (“L”, “0”)
OFF (“L”, “0”)
OFF (“L”, “0”)
6-2. SW4 (PORT B_DIR)







Setting for PORT B: AK4114 (U10)
No. Name
ON (“H”)
OFF (“L”)
1 DIF0
2 DIF1
Setting of Audio Format of AK4114

(Refer Table 2.
3 DIF2
4 CM0
5 CM1
6 OCKS0
7 OCKS1
8 NC


Selection of Clock Mode (Clock Source)

Refer Table 3.
Selection of frequency of Master Clock Output

Refer Table4.
6OVTFE

Table 3. SW4 (PORT B_DIR)
(Note) ON: “H” (“1”), OFF: “L” (“0”)
Default
OFF (“L”, “0”)
ON (“H”, “1”)
ON (“H”, “1”)
OFF (“L”, “0”)
OFF (“L”, “0”)
OFF (“L”, “0”)
OFF (“L”, “0”)
OFF (“L”, “0”)
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2005/08