AKD4683 Datasheet, PDF (12/74 Pages) Asahi Kasei Microsystems – AK4683 Evaluation Board Rev.1

ASAHI KASEI
[AKD4683-A]
4-2. PORTA: AK4114 (U7)


JP16 (MCLKA_SEL) controls PORTA: AK4114 (U7): Master Clock source (MCKO1 / MCKO2) for
AK4683: MCLK2.
In these two cases above, JP19 (MCLK_SEL) and JP22 (MCLKB_SEL) should be open.
JP16
MCLKA_SEL
MCLKA_SEL
MCKO1
MCKO2
(MCKO1)
MCKO1
MCKO2
(MCKO2)
JP19
MCLK_SEL
MCLK2
MCKI
(open)<Default>
JP22
MCLKB_SEL
MCKO1
MCKO2
(open)<Default>
Figure 18. JP16 (MCLKA_SEL)
<KM077504>
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2005/08