DSP16410CG Datasheet, PDF (85/314 Pages) Agere Systems – DSP16410CG Digital Signal Processor

Data Sheet
May 2003
DSP16410CG Digital Signal Processor
4 Hardware Architecture (continued)
4.13 Direct Memory Access Unit
(DMAU) (continued)
4.13.3 Data Structures (continued)
4.13.3.2 Two-Dimensional Data Structure (SWT
Channels) (continued)
LIM〈0—3〉: The user software must initialize the cor-
responding limit register with the dimensions of the
array. The number of rows (or elements) is r. For a sin-
gle-buffered array, the LASTROW[12:0] field is pro-
grammed to r – 1. For a double-buffered array
(Figure 21 on page 84), the LASTROW[12:0] field is
programmed to (2 × r ) – 1. The number of columns (n)
is the same as the number of buffers. Therefore, the
LASTCOL[6:0] field is programmed to n – 1.
DCNT〈0—3〉 and SCNT〈0—3〉: The corresponding
destination and source count registers contain the row
and column counters for two-dimensional array access.
The user software must initially clear these registers.
The DMAU automatically clears these registers upon
the completion of an SWT transfer and increments the
row and column counter fields of these registers as the
transfer proceeds.
STR〈0—3〉: The user software must initialize the cor-
responding stride register with the number of memory
locations between common rows (elements) of different
columns (buffers). Typical data structures have buffers
that are contiguous in memory. In this case, the stride
is the same as the buffer length (number of rows per
column). If the current column is not the last column,
the DMAU increments the contents of DADD〈0—3〉
and SADD〈0—3〉 by the stride value after each trans-
action, i.e., increments the address registers in row-
major order. This causes DADD〈0—3〉 and
SADD〈0—3〉 to address the common row in the next
column.
RI〈0—3〉: The user software must initialize the corre-
sponding reindex register to the sign-magnitude pointer
postmodification value to be applied to SADD〈0—3〉
and DADD〈0—3〉 after the DMAU has accessed the
last column. For a single-buffered array of r rows and
n columns (n > 1), the magnitude of the reindex value
is (r × (n – 1)) – 1. For a double-buffered array of
r rows and n columns (n > 1), the magnitude is
(2r × (n – 1)) – 1. Because the reindex value is always
negative for a two-dimensional array, the user software
must set the sign bit of RI〈0—3〉.
DMCON0: The user software must set the corre-
sponding SRUN[3:0] and DRUN[3:0] fields in DMCON0
to enable source and destination transfers.
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