DSP16410CG Datasheet, PDF (173/314 Pages) Agere Systems – DSP16410CG Digital Signal Processor

Data Sheet
May 2003
DSP16410CG Digital Signal Processor
4 Hardware Architecture (continued)
4.16 Serial Interface Unit (SIU) (continued)
4.16.12 Channel Mode—32 Channels or Less in Two Subframes or Less (continued)
Table 95. Subframe Selection
Input/
Output
Even/Odd
Subframes
To Select
Subframe
Input
Even
0
2
4
6
Odd
1
3
5
7
Output
Even
0
2
4
6
Odd
1
3
5
7
Set Control Bit
Name
Location
ISFIDV_E
SCON3[2]
ISFIDV_O
SCON3[5]
OSFIDV_E SCON3[10]
OSFIDV_O SCON3[13]
Configure Control Field
Name
Location
ISFID_E[1:0]
SCON3[1:0]
ISFID_O[1:0]
SCON3[4:3]
OSFID_E[1:0]
SCON3[9:8]
OSFID_O[1:0] SCON3[12:11]
Value
0
1
2
3
0
1
2
3
0
1
2
3
0
1
2
3
Table 96. Channel Activation Within a Selected Subframe
Input/
Output
Input
Output
Selected
Even/Odd
Subframe
Even
Odd
Even
Odd
Name
ISFVEC_E[15:0]
ISFVEC_O[15:0]
OSFVEC_E[15:0]
OSFVEC_O[15:0]
Control Field
Location
SCON4[15:0]
SCON5[15:0]
SCON6[15:0]
SCON7[15:0]
Description
See Figure 50 on page 174
See Figure 50 on page 174
See Figure 50 on page 174
See Figure 50 on page 174
Table 97. Channel Masking Within a Selected Subframe
Input/
Output
Output
Selected
Even/Odd
Subframe
Even
Odd
Control Field
Name
Location
OSFMSK_E[15:0]
OSFMSK_O[15:0]
SCON8[15:0]
SCON9[15:0]
Description
See Figure 50 on page 174
See Figure 50 on page 174
Agere Systems Inc.
Agere Systems—Proprietary
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