LU5X34F Datasheet, PDF (14/26 Pages) Agere Systems – Quad Gigabit Ethernet Transceiver

LU5X34F
Quad Gigabit Ethernet Transceiver
Preliminary Data Sheet
July 2000
Electrical Specifications
Transmitter
Table 4. Reference Clock Specifications (REFCLK and REFCLKN)
Parameter
Frequency Range
Frequency Tolerance
Duty Cycle*
Rise Time (PECL)
Fall Time (PECL)
Rise Time (TTL/CMOS)
Fall Time (TTL/CMOS)
In-band Jitter, 1 Gbit/s—1.25 Gbits/s
Out-of-Band Jitter
Min
100
–100
40
—
—
—
—
—
—
* Measured at 50% amplitude point.
Table 5. PLL Specifications
Parameter
Min
Typ
Bandwidth
—
1.5
Jitter Peaking
—
0.5
Lock Time
—
—
Max
125
100
60
0.8
0.8
1.5
1.5
30
50
Max
—
—
230
Table 6. Output Jitter at 1.0 Gbit/s—1.25 Gbits/s Data Rate
Parameter
Min
Max
Deterministic
Random
Total
—
0.08
—
0.12
—
0.2
Receiver
Table 7. Input Data Rate
Parameter
Frequency Range
Frequency Tolerance with REFCLK
Table 8. Data Lock Characteristics
Parameter
Min
Bandwidth*
0.3^†
Jitter Peaking*
—
Lock Time*
—
* Data pattern: 101010 . . . .
† Data pattern: 1111100000 . . . .
Min
1.0
–100
Typ
—
0.5
—
Max
1.25
100
Max
1*
—
2
Unit
MHz
ppm
%
ns
ns
ns
ns
psp-p
psp-p
Unit
MHz
dB
µs
Unit
UIp-p
UIp-p
UIp-p
Unit
Gbits/s
ppm
Unit
MHz
dB
µs
14
Lucent Technologies Inc.