LU5X34F Datasheet, PDF (11/26 Pages) Agere Systems – Quad Gigabit Ethernet Transceiver

Preliminary Data Sheet
July 2000
LU5X34F
Quad Gigabit Ethernet Transceiver
Input/Output Information (continued)
Table 3c. Pinout—Channel C I/O
Name
TXC9
TXC8
TXC7
TXC6
TXC5
TXC4
TXC3
TXC2
TXC1
TXC0
RXC9
RXC8
RXC7
RXC6
RXC5
RXC4
RXC3
RXC2
RXC1
RXC0
TXCLKC
Pin
I/O
T1
Input
R2
P3
N4
R1
P2
N3
M4
P1
N2
P6
Output
R5
U4
T5
R6
U5
T6
R7
P7
U6
U2
Input
RXCLK0C
RXCLK1C
ENCDETC
COMDETC
EWRAPC
LCKREFNC
HDINCP,
HDINCN
HDOUTCP,
HDOUTCN
LDSTC
P5
R4
L1
T4
K3
L4
L16, M17
M15, M16
L2
Output
Output
Input
Output
Input
Input
Input
Output
Input
Level
TTL/
CMOS
Description
Channel C, Transmit Data [9:0].
Parallel input bits [9:0], one 10-bit, 8b/10b encoded
data byte, clocked in on the rising edge of TXCLKC.
TXC0 is the LSB.
TTL/
CMOS
Channel C, Receive Data [9:0].
Parallel output bits [9:0], one 10-bit data type, clocked-
out on the alternate rising edge of RXCLK0C,
RXCLK1C. RXC0 is the LSB.
TTL/
CMOS
TTL/
CMOS
TTL/
CMOS
TTL/
CMOS
TTL/
CMOS
TTL/
CMOS
TTL/
CMOS
PECL
Transmit Clock (100 MHz—125 MHz).
Used to latch TXC[9:0] data into the LU5X34F.
Synchronous with REFCLK(N)
Channel C, Byte-Align Clock 0.
Channel C, Byte-Align Clock 1.
Channel C, Enable-Comma Detect.
Channel C, Byte-Aligned Comma.
Channel C, Loopback at Serial I/O.
Channel C, Lock Receiver to Clock.
Channel C, Differential Serial Inputs.
PECL Channel C, Differential Serial Outputs.
TTL/ Channel C, Load Test[5:1] Inputs.
CMOS
Lucent Technologies Inc.
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