CT2553 Datasheet, PDF (18/36 Pages) Aeroflex Circuit Technology – CT2553 / 2554 / 2555 / 2556 Advanced Integrated MUX (AIM) Hybrid FOR MIL-STD-1553

ADDITIONAL FEATURES. Four 1553 Status
Word flags can be programmed via the
appropriate Configuration Register bits. In
addition, setting Interrupt Mask Register bits will
result in a low pulse on the Interrupt (INT) pin
with each occurrence of the respective error or
end of message condition. (See Configuration
Register and Interrupt Register sections.)
THIS RT: Each command appearing on either
1553 Bus is decoded and tested for
Manchester/protocol errors. If the CT2553
receives a valid command word containing a
RTU address equivalent to the RTAD0-RTAD4
inputs (pins 10, 9, 50, 49, and 11, respectively),
THIS-RT (pin 55) will be pulsed low. This signal
can be used to identify specific 1553 commands.
This signal is also active in the BC mode.
Command Illegalization (Optional). The CT2553
has the capability to illegalize MIL-STD-1553
mode commands. In addition, valid non-mode
commands can be illegalized based upon the
Command Word subaddress field. An illegal
command is identified by driving the Illegal
Command, ILLCMD (pin 12) input low. The
CT2553 multiplexes the Word Count and
Subaddress fields (pins SA/MC0 - SA/MC4).
The CT2553 responds to illegalized commands
by transmitting its Status Word with the Message
Error bit set. No data words are transmitted;
received words, however, are placed in the
shared RAM locations indicated by the current
area Look-Up Table.
Upon receipt of a valid mode command, the
CT2553 will output the Command Word-Word
Count field and set the Latched Mode Command
(LMC) output to a logic 1. Upon receipt of a valid
non-mode command, the CT2553 will output the
Command Word-Subaddress field and set the
Latched Mode Command (LMC) output to a
logic 0.
An external PROM can be used for command
illegalization by decoding the word
count/subaddress, LMC and Broadcast Received
(BCSTRCV) bits and driving ILLCMD low where
appropriate (See Figure 23).
BUSY BIT. If the user asserts the BUSY bit low
in the Configuration Register, the CT2553 will
respond with a Status Word with the BUSY bit
set. In addition, no data words will be transferred
from the shared RAM as indicated by the
corresponding value in the current area Look-Up
Table. The CT2553 will transfer data associated
with a Receive Command into memory but will
not transmit data out onto the MIL-STD-1553 bus
when busy upon receipt of a Transmit Command.
LMC
SA/MC0-4, T/R
ILLCMD
VALID UNTIL NEXT VALID COMMAND WORD RECEIVED
t1
LATCHED UNTIL NEXT VALID COMMAND WORD RECEIVED
SYMBOL
t1
Mode Command Illegalization Timing
DESCRIPTION
MIN
LMC to ILLCMD latch
250
MAX
-
UNITS
ns
Figure 23 – Mode Command/Sub-Address Illegalization Timing
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