COREMP7 Datasheet, PDF (27/30 Pages) Actel Corporation – CoreMP7

CoreMP7
The EmbeddedICE logic contains 16 registers, as shown in Table 9. The CoreMP7 debug architecture is described in
detail in ARM7TDMI-S (rev 4) Technical Reference Manual (ARM DDI0234A), published by ARM Limited, and is
available via Internet at www.arm.com.
Table 9 •
EmbeddedICE Logic Registers
Name
Width
Description
Address
Debug Control
6
Force debug state, disable interrupts
00000
Debug Status
5
Status of debug
00001
Debug Comms Control Register
32
Debug communication control register
00100
Debug Comms Data Register
32
Debug communication data register
00101
Watchpoint 0 Address Value
32
Holds watchpoint 0 address value
01000
Watchpoint 0 Address Mask
32
Holds watchpoint 0 address mask
01001
Watchpoint 0 Data Value
32
Holds watchpoint 0 data value
01010
Watchpoint 0 Data Mask
32
Holds watchpoint 0 data mask
01011
Watchpoint 0 Control Value
9
Holds watchpoint 0 control value
01100
Watchpoint 0 Control Mask
8
Holds watchpoint 0 control mask
01101
Watchpoint 1 Address Value
32
Holds watchpoint 1 address value
10000
Watchpoint 1 Address Mask
32
Holds watchpoint 1 address mask
10001
Watchpoint 1 Data Value
32
Holds watchpoint 1 data value
10010
Watchpoint 1 Data Mask
32
Holds watchpoint 1 data mask
10011
Watchpoint 1 Control Value
9
Holds watchpoint 1 control value
10100
Watchpoint 1 Control Mask
8
Holds watchpoint 1 control mask
10101
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