COREMP7 Datasheet, PDF (15/30 Pages) Actel Corporation – CoreMP7

CoreMP7
SoC System
Testbench
SoC W rapper
SoC Subsystem
Memory _ARM7-AHB
C on tr o lle r
Bridge
AR M7
BFM
SSRAM
Flash
MAC 10/100 ^CoreUART
Video Codec
BFM Test
Script
BFM Log
File
User-
Defined
Tasks and
Function
Video Test Stub
MAC Test Stub
Figure 9 • SoC System-Level Testbench Example
The developer may edit the SoC Verilog/VHDL to add
new design blocks, such as the VideoCodec in the above
diagram. The system-level testbench may also be filled
out by the developer to include tasks that test any newly
added functionality or additional stubs that allow more
complex system testing involving the IP cores. The BFM
input scripts may also be manually enhanced to allow the
user to test access to register locations in newly added
logic. In this way, the user can provide stimuli to the
system from the inside (via the ARM7 BFM), as well as
from the outside (via testbench tasks).
Figure 10 shows the design flow into which the BFM fits.
Actel IP Core
Attributes (SPIRIT)
User Input
Memory Map Definition
IP Cores Selection
Bus Fabric Selection
Core Console
BFM Test Script
Figure 10 • BFM Flow Diagram
SoC System Testbench
BFM Log File
v2.6
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