EX128-TQG100A Datasheet, PDF (23/44 Pages) Actel Corporation – eX Automotive Family FPGAs

Input Buffer Delays
C-Cell Delays
eX Automotive Family FPGAs
PAD
Y
INBUF
In
Out
GND
3V
1.5 V 1.5 V
0V
VCC
50%
50%
t_INY
t_INY
Table 1-14 • Input Buffer Delays
Cell Timing Characteristics
S
AY
B
S, A, or B
Out
GND
Out
V_CC
50% 50%
V_CC
50%
GND
50%
t
PD
50%
t_PD
t
PD
GND
t_PD
V_CC
50%
Table 1-15 • C-Cell Delays
D
CLK
Q
CLR
PRESET
Figure 1-17 • Flip-Flops
t _SUD
D _PRESET Q
CLK _CLR
(Positive edge triggered)
t_HD
t
t
HPWH^,
RPWH
t_RCO
t_{H P}
t_HPWL, t_RPWL
t_CLR
t_WASYN
t_PRESET
v3.2
1-19