EX128-TQG100A Datasheet, PDF (13/44 Pages) Actel Corporation – eX Automotive Family FPGAs

eX Automotive Family FPGAs
JTAG Instructions
Table 1-5 lists the supported instructions with the
corresponding IR codes for eX devices.
Table 1-5 • JTAG Instruction Code
Instructions (IR4: IR0)
EXTEST
SAMPLE / PRELOAD
INTEST
USERCODE
IDCODE
HIGHZ
CLAMP
Diagnostic
BYPASS
Reserved
Binary Code
00000
00001
00010
00011
00100
01110
01111
10000
11111
All others
Table 1-6 lists the codes returned after executing the
IDCODE instruction for eX devices. Note that bit 0 is
always "1." Bits 11-1 are always "02F," which is Actel's
manufacturer code.
Table 1-6 • IDCODE for eX Devices
Device
Revision Bits 31-28 Bits 27-12
eX64
0
8
40B2, 42B2
eX128
0
9
40B0, 42B0
eX256
0
9
40B5, 42B5
eX64
1
A
40B2, 42B2
eX128
1
B
40B0, 42B0
eX256
1
B
40B5, 42B5
Programming
Device programming is supported through Silicon
Sculptor series of programmers. In particular, Silicon
Sculptor II is a compact, robust, single-site and multi-site
device programmer for the PC.
With standalone software, Silicon Sculptor II allows
concurrent programming of multiple units from the
same PC, ensuring the fastest programming times
possible. Each fuse is subsequently verified by Silicon
Sculptor II to insure correct programming. In addition,
integrity tests ensure that no extra fuses are
programmed. Silicon Sculptor II also provides extensive
hardware self-testing capability.
The procedure for programming an eX device using
Silicon Sculptor II is as follows:
1. Load the .AFM file
2. Select the device to be programmed
3. Begin programming
When the design is ready to go to production, Actel
offers device volume-programming services either
through distribution partners or via in-house
programming from the factory.
For more details on programming eX Automotive
devices, please refer to the Programming Antifuse
Devices and the Silicon Sculptor II User's Guides.
Probing Capabilities
Automotive-grade eX devices provide internal probing
capability that is accessed with the JTAG pins. The Silicon
Explorer II Diagnostic hardware is used to control the
TDI, TCK, TMS, and TDO pins to select the desired nets
for debugging. The user assigns the selected internal
nets in the Silicon Explorer II software to the PRA/PRB
output pins for observation. Probing functionality is
activated when the BST pins are in JTAG mode and the
TRST pin is driven High or left floating. If the TRST pin is
held Low, the TAP controller will remain in the Test-
Logic-Reset state, so no probing can be performed. The
Silicon Explorer II automatically places the device into
JTAG mode, but the user must drive the TRST pin High or
allow the internal pull-up resistor to pull TRST High.
When you select the "Reserve Probe" box, as shown in
Figure 1-12 on page 1-8, the Designer software reserves
the PRA and PRB pins as dedicated outputs for probing.
This "reserve" option is merely a guideline. If the
Designer software requires that the PRA and PRB pins be
user I/Os to achieve successful layout, the tool will use
these pins for user I/Os. If you assign user I/Os to the PRA
and PRB pins and select the "Reserve Probe" option,
Designer Layout will override the option and place user
I/Os on those pins.
To allow for probing capabilities, the security fuse must
not be programmed. Programming the security fuse will
disable the probe circuitry. Table 1-7 on page 1-10
summarizes the possible device configurations for
probing once the device leaves the "Test-Logic-Reset"
JTAG state.
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