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U1AFS250-FG256 Datasheet, PDF (18/27 Pages) Actel Corporation – 3 - DC and Power Characteristics
DC and Power Characteristics
Standby Mode
PDYN = PXTL-OSC
Sleep Mode
PDYN = 0 W
Global Clock Dynamic Contribution—PCLOCK
Operating Mode
PCLOCK = (PAC1 + NSPINE * PAC2 + NROW * PAC3 + NS-CELL * PAC4) * FCLK
NSPINE is the number of global spines used in the user design—guidelines are provided in
Table 3-13 on page 3-21.
NROW is the number of VersaTile rows used in the design—guidelines are provided in
Table 3-13 on page 3-21.
FCLK is the global clock signal frequency.
NS-CELL is the number of VersaTiles used as sequential modules in the design.
Standby Mode and Sleep Mode
PCLOCK = 0 W
Sequential Cells Dynamic Contribution—PS-CELL
Operating Mode
PS-CELL = NS-CELL * (PAC5 + (α1 / 2) * PAC6) * FCLK
NS-CELL is the number of VersaTiles used as sequential modules in the design. When a multi-
tile sequential cell is used, it should be accounted for as 1.
α1 is the toggle rate of VersaTile outputs—guidelines are provided in Table 3-13 on
page 3-21.
FCLK is the global clock signal frequency.
Standby Mode and Sleep Mode
PS-CELL = 0 W
Combinatorial Cells Dynamic Contribution—PC-CELL
Operating Mode
PC-CELL = NC-CELL* (α1 / 2) * PAC7 * FCLK
NC-CELL is the number of VersaTiles used as combinatorial modules in the design.
α1 is the toggle rate of VersaTile outputs—guidelines are provided in Table 3-13 on
page 3-21.
FCLK is the global clock signal frequency.
Standby Mode and Sleep Mode
PC-CELL = 0 W
Routing Net Dynamic Contribution—PNET
Operating Mode
PNET = (NS-CELL + NC-CELL) * (α1 / 2) * PAC8 * FCLK
NS-CELL is the number VersaTiles used as sequential modules in the design.
NC-CELL is the number of VersaTiles used as combinatorial modules in the design.
α1 is the toggle rate of VersaTile outputs—guidelines are provided in Table 3-13 on
page 3-21.
FCLK is the global clock signal frequency.
3-18
Preliminary v0.4