Z86U18 Datasheet, PDF (24/30 Pages) Zilog, Inc. – USB Device Controller with CMOS Z86K15 MCU

Z86U18
USB Device Controller with CMOS Z86K15 MCU
REGISTER DESCRIPTIONS (Continued)
Zilog
006h
D7 D6 D5 D4 D3 D2 D1 D0
Endpoint 0 Interrupt
IN Endpoint Interrupt
Suspend Interrupt
Resume Interrupt
00000
Bit No Bit Description
mC
3
Resume Interupt
R
2
Suspend Interrupt R
1
IN Endpoint Interrupt R
0
Endpoint 0 Interrupt R
Figure 36. Interrupt Register
SIE
Description
W
The ßag is sent on the Host signal to resume operations.
W
The bit is set when theSuspend signaling is received from the host.
W
This bit is set upon:
1) clearing in_pkt_ rdy
2) setting Force STALL.
W
This bit set by SIE upon:
1) setting out_pkt_rdy
2) clearing in_pkt_rdy
3) setting Force STALL
4) clearing data_end
5) setting data_end
007h
D7 D6 D5 D4 D3 D2 D1 D0
Suspend
Send Resume
Interrupt Mask Bits
000
Figure 37. Misc. Register
Bit No Bit Description mC SIE
4:2 Interrupt Mask Bits R/W R
1
Send Resume
W
R
0
Suspend
R/W W
Description
This has bit correspondence to the interrupt register. A value of 1, implies
that particular interrupt is disabled.
The microcontroller writes a 1 to this bit, while in suspend mode, and
wants to start a resume sequence after the clocks are running. This bit is
set high for a duration of at least 10 ms by microcontroller.
This bit is set by the SIE when, the microcontroller is to enter suspend
mode. The microcontroller clears this bit after Þnishing resume signaling,
or after it receives a resume out interrupt, and the clocks have started.
24
PRELIMINARY
DS97KEY0102