Z86U18 Datasheet, PDF(18/30 Page) Zilog, Inc. – USB Device Controller with CMOS Z86K15 MCU

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

Z86U18 Datasheet, PDF (18/30 Pages) Zilog, Inc. – USB Device Controller with CMOS Z86K15 MCU

◁

Z86U18

USB Device Controller with CMOS Z86K15 MCU

Zilog

FUNCTIONAL DESCRIPTION (Continued)

Power-On-Reset (POR). A timer circuit is triggered by the

system oscillator and is used for the Power-On Reset

(POR) timer function. The POR time allows VCC and the os-

cillator circuit to stabilize before instruction execution be-

gins. POR period is defined as:

POR (ms) = 98 ms

The POR timer circuit is a one-shot timer triggered by low-

er fail to Power OK status. The POR time is a nominal 100

ms at 6 MHz. The POR time is bypassed after Stop-Mode

Recovery.

HALT. HALT turns off the internal CPU clock, but not the

oscillator. The counter/timer and external interrupts IRQ0,

IRQ1, IRQ2, and IRQ3 remain active. The Z86U18 recov-

ers by interrupts, either externally or internally.

USB Reset. Detection by the SIE of a reset from the Host

will cause the chip to reset. The reset will be remembered

so that the program can decide the source of the reset.

The USB Reset will act even if the chip is in the STOP

mode.

STOP. This instruction turns off the internal clock and ex-

ternal crystal oscillation. It reduces the standby current to

less than 10 mA. The STOP Mode is terminated by an in-

terrupt. An interrupt from any of the active (enabled) inter-

rupts will remove the chip from the STOP Mode ( Ports 31-

33 and the USB reset). The timer can not do this as the

clock is stopped. This causes the processor to restart the

application program at the address or the vector of the in-

terrupt and continue the program at the end of the interrupt

service routine. In order to enter STOP (or HALT) Mode, it

is necessary to first flush the instruction pipeline to avoid

suspending execution in mid-instruction. To do this, the

user must execute a NOP (opcode=FFH) immediately be-

fore the appropriate sleep instruction, such as:

NOP

STOP

NOP

HALT

; clear the pipeline

; enter STOP Mode

; clear the pipeline

; enter HALT Mode

PRELIMINARY

DS97KEY0102

▷