Z86U18 Datasheet, PDF (23/30 Pages) Zilog, Inc. – USB Device Controller with CMOS Z86K15 MCU

Zilog
Bit
mC
7:0
R/W
Z86U18
USB Device Controller with CMOS Z86K15 MCU
003h
D7 D6 D5 D4 D3 D2 D1 D0
1
FIFO Data
Figure 33. Endpoint 0 FIFO Register
SIE
Description
R/W
This is the Endpoint 0 FIFO data register.
004h
D7 D6 D5 D4 D3 D2 D1 D0
In_pkt _rdy
Force Stall
/Bit No Bit Description mC
4:2
IN MAXP
W
1
Force STALL R/W
0
In Packet Ready W
IN MAXP
000
Figure 34. IN CS Register
SIE
Description
R
Before setting in_pkt_rdy, the microcontroller writes the maximum packet
size to these bits. The default value = 8 Bytes.
W
The SIE writes this register, when it encounters a protocol violation, and
issues a STALL handshake to the current transfer. The microcontroller sets
this bit, when it receives a SET_FEATURE (ENDPOINT_STALL), and clears
it, when it receives a CLEAR_FEATURE (ENDPOINT_STALL).
R
After the microcontroller has Þlled the data, it sets this bit. It is cleared by
SIE upon successful transmission of data.
005h
D7 D6 D5 D4 D3 D2 D1 D0
FIFO Data
Figure 35. IN FIFO Register
Bit
mC
SIE
Description
7:0
W
R
The microcontroller writes IN data to this register.
DS97KEY0102
PRELIMINARY
23