Z02215 Datasheet, PDF (14/74 Pages) Zilog, Inc. – Single Chip Modem with Integrated Controller, Data Pump, and Analog Front End

Z02215
Single Chip Modem with Integrated Controller, Data Pump, and AFE
8
Table 1. Pin Descriptions (Continued)
Symbol
TXD/IRQ
PLCC LQFP
Pin # Pin #
29 12
Function
Direction Description
Transmit Data Input
Active Low, Serial mode only. Serial transmit
data to the DSP is presented on this pin.
TCLK/ 30 13
HCS
Interrupt
Request
Open
Drain
Output
Transmit Serial Output
Data Clock
Active Low, Parallel mode only. This pin goes
Low in response to an interrupt from the Parallel
Interface which is enabled. IRQ returns High
when the source of the interrupt is serviced, or
by disabling the interrupt.
Serial mode only. This pin is a synchronous
data clock used to transfer serial data via TXD
to the DTE. The clock frequencies are
2400,1200, and 300 Hz.
RXD/HWR 31 14
Host Chip
Select
Input
Receive Data Output
Active Low, Parallel mode only.
When this pin goes Low, data transfer between
the Z02215 Parallel Interface and the Host are
enabled. Data transfers are 8 bits wide.
Active Low, Serial mode only. The serial
receive data from the DSP is presented on this
pin.
RCLK/ 32 15
HRD
Host Write
Input
Receive Serial Output
Data Clock
Active Low, Parallel mode only.
On the rising edge of HWR the data on HD7–
HD0 is written to register PIDR or PISR
depending on the state of HA0 and provided
HCS is Low.
Serial mode only. This pin is a synchronous
data clock used to transfer serial data via RXD
to the DTE. The clock frequencies are 2400 Hz,
1200 Hz, and 300 Hz.
V_DD
33 16
D_GND
34
17
Host Read
Input
Digital Power
Digital Ground
Active Low, Parallel mode only. When this pin
and HCS is Low, the contents of register PIDR
or PISR, (depending on the state of HA0), is
placed on HD7–HD0. See Table 2, “Status
Register,” on page 11
PS001907-0904
Pin Descriptions