MT90502 Datasheet, PDF (187/191 Pages) Zarlink Semiconductor Inc – Multi-Channel AAL2 SAR

Preliminary Datasheet
5.2
Terms specific to AAL2
MT90502
CID: Channel IDentifier. The CID is an 8-bit field that identifies an AAL2 CPS-Packet and determines which of
the 255 AAL2 channels on this VC it belongs to. The value of 00h is illegal for the CID, values 01h to 07h are
denoted as reserved for use by the AAL type 2.
EDU: Encoding Data Unit. A group of 8 PCM bytes or 8 ADPCM samples that represent 1 ms of voice traffic.
The size of every PCM or ADPCM CPS-Packet sent on AAL2 is an integer number of EDUs.
LI: Length Indicator. The LI is a 6-bit field encoded with a value that is one less than the number of octets in the
CPS-Packet Payload portion of a CPS-Packet.
SID: Silent Insertion Descriptor. A SID CPS-Packet is an AAL2 CPS-Packet containing a single byte of payload
that is inserted when a valid CPS-Packet has been suppressed because it was silent. The payload byte
indicates the energy level of the voice that was suppressed.
UUI: User-to-User Indication. The UUI is a 5-bit field contained within the AAL2 header that is used to indicate
the type of an AAL2 CPS-Packet. When indicating voice data, the UUI is often used as a 4-bit sequence
number.
5.3
Terms specific to this specification
AAL2 Channel: Any sub-channel carried by an AAL2 VC. An AAL2 channel is uniquely identified by its CID
and the VPI/VCI of the VC it belongs to.
AAL2 CPS-Packet: A CPS-Packet contained within one or many AAL2 cells. AAL2 CPS-Packets contain 3
bytes of overhead (including CID, LI, UUI and HEC) and from 1 to 64 bytes of payload. Because of this 64-byte
maximum, they can straddle many cells. Also known as CPS-packet.
HDLC Stream: A group of HDLC channels that are carried over the same time slots. HDLC CPS-Packets in
streams have an address byte that indicates to which HDLC channel they belong. Usually, HDLC streams carry
a series of channels communicating to and from the same agent (e.g. a DSP). HDLC Streams must be carried
over a single H.100 stream and over one or multiple consecutive time slots on that stream.
HDLC channel: An HDLC channel carries CPS-Packets destined to the same AAL2 channel. All CPS-Packets
of an HDLC channel are carried by the same HDLC stream.
PDV: Packet Delay Variation. AAL2 CPS-Packets arrive with a certain delay with respect to when they were
sent. PDV is a measure of how much that delay varies on an AAL2 channel. PDV measures the peak-to-peak
packet delay throughout the network. PDV is only relevant on CBR connections.
Time Slot: In this document, the term time slot is often used to define a combination of a time slot and a stream
on the H.100 bus. Thus a time slot would represent a single 8-bit slot every 125 us on the TDM bus.
5.4
Register types
CNT: Counter. Events in the MT90502 will cause the counter to increment.
CRL: Counter Roll-Over: This bit indicates its respect counter has wrapped.
IE: Interrupt Enable. This is a register bit that enables a status event to generate an interrupt. This bit is always
active-high.
PC: Process Control bit. This is a register bit type that is written to ‘1’ to initiate a hardware process. When the
process completes, the hardware clears the bit.
PUL: Pulse. This bit is used to set an event. Setting this bit, creates a pulse in the MT90502 of 1 clock period.
The hardware then clears this bit.
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