MT90502 Datasheet, PDF (133/191 Pages) Zarlink Semiconductor Inc – Multi-Channel AAL2 SAR

Preliminary Datasheet
MT90502
Address: 504h
Label: status0_ie
Reset Value: 0000h
Label
Bit
Position
Type
Description
llman_process_crashed_ie
0
copying_out_of_bandwidth_ie
1
frame_reading_out_of_bandwidth_ie
2
bad_packet_length_ie
3
circular_buffer_overflow_ie
4
cps_packet_refused_error_ie
5
txsar_wbcache_overflow_ie
6
txtdm_wcache_overflow_ie
7
packet_fifo_overflow_ie
8
IE When ‘1’ and the corresponding status bit is ‘1’ an
interrupt will be generated.
IE When ‘1’ and the corresponding status bit is ‘1’ an
interrupt will be generated.
IE When ‘1’ and the corresponding status bit is ‘1’ an
interrupt will be generated.
IE When ‘1’ and the corresponding status bit is ‘1’ an
interrupt will be generated.
IE When ‘1’ and the corresponding status bit is ‘1’ an
interrupt will be generated.
IE When ‘1’ and the corresponding status bit is ‘1’ an
interrupt will be generated.
IE When ‘1’ and the corresponding status bit is ‘1’ an
interrupt will be generated.
IE When ‘1’ and the corresponding status bit is ‘1’ an
interrupt will be generated.
IE When ‘1’ and the corresponding status bit is ‘1’ an
interrupt will be generated.
misaligned_flag_ie
bad_idle_code_ie
short_packet_ie
dcoffset_overflow_ie
Reserved
9
10
11
12
15:13
IE When ‘1’ and the corresponding status bit is ‘1’ an
interrupt will be generated.
IE When ‘1’ and the corresponding status bit is ‘1’ an
interrupt will be generated.
IE When ‘1’ and the corresponding status bit is ‘1’ an
interrupt will be generated.
IE When ‘1’ and the corresponding status bit is ‘1’ an
interrupt will be generated.
RO Reserved. Always read as “000”
Table 94 - TDM TX Interrupt Enable Register
133