MT90528 Datasheet, PDF (109/195 Pages) Zarlink Semiconductor Inc – 28-Port Primary Rate Circuit Emulation AAL1 SAR

MT90528
Data Sheet
5.0 Memory
5.1 Internal Memory Map
CPU Byte Address
(hex)
Description
Notes
8 xxxx - TX_SAR Control Memory
80000 - 87FFE
Per-VC UDT and SDT Segmentation Con-
trol Structures
Segmentation SDT Pointer Tables
Normal CPU access - writes and reads
Buffer is 16 Kwords long
9 xxxx - SDT RX_SAR Control Memory
90000 - 97FFE
Per-VC SDT Reassembly Control Struc-
tures
Normal CPU access - writes and reads
Buffer is 16 Kwords long
A xxxx - TDM Output Control
A0000 - A003E
A0800 - A083E
TDM SDT Reassembly CS - port #0
TDM SDT Reassembly CS - port #1
Normal CPU access - writes and reads
Each per-port buffer is 32 words long.
...
...
AD800- AD83E
TDM SDT Reassembly CS - port #27
B xxxx - UDT RX_SAR Control Memory
BE000 - BE01E
UDT RX_SAR CS - port #0
Normal CPU access - writes and reads
BE020 - BE03E
UDT RX_SAR CS - port #1
Each per-port buffer is 16 words long.
...
...
BE360 - BE37E
UDT RX_SAR CS - port #27
C xxxx - UTOPIA
C 0000 - C07FE
UTOPIA RX FIFO
CPU read access for debug
32 cells X 64 bytes/cell = 2048 bytes
C 1000 - C11FE
UTOPIA TX FIFO
CPU read access for debug
8 cells X 64 bytes/cell = 512 bytes
Table 25 - Internal Memory Map
5.2 External Memory
Several buffers and structures are stored in external memory when transmitting and receiving SDT and/or data
cells. Since the location of the buffers and structures is not hard-coded in the hardware, the user can program the
chip to put these at any location in the external memory. The following list describes the various items located in
external memory, if the chip is programmed to support data and SDT cells. Note that the entire external memory
space is used (1M word) if the maximum size is chosen for all of these items.
As pointed out previously in this document, note that no external memory is required if the device is configured
solely for UDT operation, provided that no data cell transmission or reception is required.
• UTOPIA Look-up Table
• configured based on N, the number of least-significant VCI bits, and M, the number of least-significant
VPI bits, (programmed by the user in the UNCB register) used to form the search addresses within the
look-up table
• maximum of 64 K words
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