GP4020 Datasheet, PDF (1/17 Pages) Zarlink Semiconductor Inc – GPS Receiver Baseband Processor

GP4020
GPS Receiver Baseband Processor
Features
• Complete GPS correlator and Firefly MF1
microcontroller core
• ARM 7TDMI^TM (Thumb^®) Microprocessor, with JTAG
ICEBreaker^TM Debug Interface
• Fully Configurable External Data Bus
• 12 Fully Independent Correlation Channels
• Low Voltage Operation: 3·3V
• Low Current Power–Down Mode
• 1PPS UTC Aligned Timing Output
• Dual UART
• 3-wire BµILD Serial Input/Output (BSIO) Interface
• 8 General Purpose Input/Output (GPIO) Lines
• Boot ROM, allowing Software Upload via UART
• 8K Bytes Internal SRAM
• Compatible with GP2015 and GP2010 RF Front Ends
Applications
• GPS Navigation Systems
• GPS Geodetic Receivers
• Time Transfer Receivers
• Automatic Vehicle Location (AVL)
• E911 Emergency Positioning
Related Products
Part
Description
GP2015
GP2010
GPS Receiver RF Front End
(TQFP 48 package)
GPS Receiver RF Front End
(PQFP 44 package)
Data sheet
DS4374
DS4056
DS5134
ISSUE 4.4
May 2002
Ordering Information
GP4020/IG/GQ1N (trays)
GP4020/IG/GQ1Q (tape and reel, 1000 units per reel)
The GP4020 is available in a 100 pin PQFP package in
Industrial (-40°C to +85°C) grade. The ordering code is
standard for screened devices
Description
The GP4020 is a complete digital baseband processor
for a Global Positioning System (GPS) receiver. It
combines the 12-channel correlator function of the
GP2021 with an advanced ARM7TDMI (Thumb)
microprocessor to achieve a higher level of integration,
reduced system cost, reduced power consumption and
added functionality. The GP4020 complements the
GP2015 and GP2010 C/A code RF downconverters
available from Zarlink Semiconductor.
The correlator section contains 12 identical tracking
module blocks, one for each channel. Each channel
contains all the components necessary for acquiring
and tracking the received signal, and also contains
other functional blocks, which are used to produce part
of the measurement data set. Individual channels may
be deactivated for systems not requiring full 12-channel
operation and thus allowing for reduced power
consumption and processor loading.
The microprocessor section contains the Firefly MF1
microcontroller core, which includes an ARM7TDMI
with a Thumb instruction de-compressor plus the Firefly
BµILD module. Also included are a second UART,
BµILD Serial I/O, General I/O and Watchdog functions.
Absolute Maximum Ratings
Supply voltage (V_DD) from ground (GND)
Bias for 5V inputs
Input voltage (any input pin)
Output voltage (any output pin)
Storage temperature
Static discharge (HBM)*
-0·5V to +5·0V
+7·0V max.
GND-0·5V to V_DD+0·5V
GND-0·5V to V_DD+0·5V
-55°C to +150°C
2kV
*Mil Std 883 Human Body Model = discharge from 100pF through
1500Ω between any 2 pins
Manufactured under licence from ARM Ltd
ARM and the ARM logo are trademarks of Advanced RISC Machines Ltd